Coverage for pyEDAA / OutputFilter / Xilinx / PhysicalOptimizeDesign.py: 100%

1# ==================================================================================================================== # 

2# _____ ____ _ _ ___ _ _ _____ _ _ _ # 

3# _ __ _ _| ____| _ \ / \ / \ / _ \ _ _| |_ _ __ _ _| |_| ___(_) | |_ ___ _ __ # 

4# | '_ \| | | | _| | | | |/ _ \ / _ \ | | | | | | | __| '_ \| | | | __| |_ | | | __/ _ \ '__| # 

5# | |_) | |_| | |___| |_| / ___ \ / ___ \ | |_| | |_| | |_| |_) | |_| | |_| _| | | | || __/ | # 

6# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)___/ \__,_|\__| .__/ \__,_|\__|_| |_|_|\__\___|_| # 

7# |_| |___/ |_| # 

8# ==================================================================================================================== # 

9# Authors: # 

10# Patrick Lehmann # 

11# # 

12# License: # 

13# ==================================================================================================================== # 

14# Copyright 2025-2026 Electronic Design Automation Abstraction (EDA²) # 

15# # 

16# Licensed under the Apache License, Version 2.0 (the "License"); # 

17# you may not use this file except in compliance with the License. # 

18# You may obtain a copy of the License at # 

19# # 

20# http://www.apache.org/licenses/LICENSE-2.0 # 

21# # 

22# Unless required by applicable law or agreed to in writing, software # 

23# distributed under the License is distributed on an "AS IS" BASIS, # 

24# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # 

25# See the License for the specific language governing permissions and # 

26# limitations under the License. # 

27# # 

28# SPDX-License-Identifier: Apache-2.0 # 

29# ==================================================================================================================== # 

30# 

31"""A filtering anc classification processor for AMD/Xilinx Vivado Synthesis outputs.""" 

32from re import compile, Pattern 

33from typing import ClassVar, Type, Tuple, Dict 

34 

35from pyTooling.Decorators import export 

36 

37from pyEDAA.OutputFilter.Xilinx.Common2 import Task, TaskWithPhases, Phase 

38from pyEDAA.OutputFilter.Xilinx.Common2 import MAJOR, MAJOR_MINOR, MAJOR_MINOR_MICRO, MAJOR_MINOR_MICRO_NANO 

39 

40 

41@export 

42class InitialUpdateTimingTask(Task): 

43 _NAME: ClassVar[str] = "Initial Update Timing Task" 

44 _START: ClassVar[str] = "Starting Initial Update Timing Task" 

45 _FINISH: ClassVar[str] = None 

46 

47 

48@export 

49class Phase_PlacerInitialization(Phase): 

50 _START: ClassVar[Pattern] = compile(f"^Phase {MAJOR} Physical Synthesis Initialization") 

51 _FINISH: ClassVar[str] = "Phase {phaseIndex} Physical Synthesis Initialization | Checksum:" 

52 

53 

54@export 

55class Phase_DSPRegisterOptimization(Phase): 

56 _START: ClassVar[Pattern] = compile(f"^Phase {MAJOR} DSP Register Optimization") 

57 _FINISH: ClassVar[str] = "Phase {phaseIndex} DSP Register Optimization | Checksum:" 

58 

59 

60@export 

61class Phase_CriticalPathOptimization_1(Phase): 

62 _START: ClassVar[Pattern] = compile(f"^Phase {MAJOR} Critical Path Optimization") 

63 _FINISH: ClassVar[str] = "Phase {phaseIndex} Critical Path Optimization | Checksum:" 

64 

65 

66@export 

67class Phase_CriticalPathOptimization_2(Phase): 

68 _START: ClassVar[Pattern] = compile(f"^Phase {MAJOR} Critical Path Optimization") 

69 _FINISH: ClassVar[str] = "Phase {phaseIndex} Critical Path Optimization | Checksum:" 

70 

71 

72@export 

73class PhysicalSynthesisTask(TaskWithPhases): 

74 _NAME: ClassVar[str] = "Physical Synthesis Task" 

75 _START: ClassVar[str] = "Starting Physical Synthesis Task" 

76 _FINISH: ClassVar[str] = "Ending Physical Synthesis Task" 

77 

78 _PARSERS: ClassVar[Tuple[Type[Phase], ...]] = ( 

79 Phase_PlacerInitialization, 

80 Phase_DSPRegisterOptimization, 

81 Phase_CriticalPathOptimization_1, 

82 Phase_CriticalPathOptimization_2 

83 )