Documentation Coverage Report
| Filename | Total | Covered | Missing | Coverage in % |
|---|---|---|---|---|
| 📦pyEDAA.ProjectModel | 169 | 123 | 46 | 72.8% |
| 📦Altera | 1 | 1 | 0 | 100.0% |
| ⚙️Quartus | 3 | 3 | 0 | 100.0% |
| 📦Intel | 1 | 1 | 0 | 100.0% |
| ⚙️QuartusPrime | 3 | 3 | 0 | 100.0% |
| 📦MentorGraphics | 1 | 1 | 0 | 100.0% |
| ⚙️ModelSim | 4 | 1 | 3 | 25.0% |
| ⚙️QuestaSim | 4 | 1 | 3 | 25.0% |
| 📦Xilinx | 1 | 1 | 0 | 100.0% |
| ⚙️ISE | 3 | 1 | 2 | 33.3% |
| ⚙️Vivado | 31 | 4 | 27 | 12.9% |
| ⚙️Attributes | 5 | 1 | 4 | 20.0% |
| ⚙️GHDL | 2 | 2 | 0 | 100.0% |
| ⚙️OSVVM | 23 | 2 | 21 | 8.7% |
| ⚙️VHDL | 0 | 0 | 0 | 100.0% |
| ⚙️Verilog | 2 | 2 | 0 | 100.0% |
| Overall (16 files): | 205 | 134 | 71 | 65.4% |
| Documentation Coverage | Coverage Level |
|---|---|
| ≤10 % | almost undocumented |
| ≤20 % | almost undocumented |
| ≤30 % | almost undocumented |
| ≤40 % | poorly documented |
| ≤50 % | poorly documented |
| ≤60 % | roughly documented |
| ≤70 % | roughly documented |
| ≤80 % | roughly documented |
| ≤85 % | well documented |
| ≤90 % | well documented |
| ≤95 % | well documented |
| ≤100 % | excellent documented |
Documentation coverage generated with “””docstr-coverage””” and visualized by sphinx-reports.