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The pyEDAA.ProjectModel Documentation

An abstract model of HDL design projects and EDA tooling.

Main Goals

This package provides a unified abstract project model for HDL designs and EDA tools. Third-party frameworks can derive own classes and implement additional logic to create a concrete project model for their tools.

Frameworks consuming this model can build higher level features and services on top of such a model, while supporting multiple input sources.

Use Cases

• Describing HDL projects for open source simulation and synthesis tools: GHDL, Icarus Verilog, Verilator, Yosys, Verilog to Routing (VTR), nextpnr, etc.

• Managing IP cores and projects with pyIPCMI.

Contributors

• Patrick Lehmann (Maintainer)

• Unai Martinez-Corral

• and more…

License

This Python package (source code) is licensed under Apache License 2.0.
The accompanying documentation is licensed under Creative Commons - Attribution 4.0 (CC-BY 4.0).