Unittest Summary Report

Testsuite / Testcase	Testcases	Skipped	Errored	Failed	Passed	Runtime (HH:MM:SS.sss)
							✅DependencyScan	1	1	0	0	0	00:00:00.000
✅VHDL	1	1	0	0	0	00:00:00.000
⚠test_VHDLLibrary						00:00:00.000
✅Design	16	0	0	0	16	00:00:00.002
✅Attributes	6	0	0	0	6	00:00:00.000
✅Instantiate	3	0	0	0	3	00:00:00.001
✅Properties	6	0	0	0	6	00:00:00.000
✅Validate	1	0	0	0	1	00:00:00.001
✅File	21	0	0	0	21	00:00:00.002
✅AttributeResolution	4	0	0	0	4	00:00:00.000
✅Attributes	6	0	0	0	6	00:00:00.000
✅Instantiate	5	0	0	0	5	00:00:00.000
✅Properties	5	0	0	0	5	00:00:00.001
✅Validate	1	0	0	0	1	00:00:00.001
✅FileSet	36	0	0	0	36	00:00:00.002
✅AttributeResolution	2	0	0	0	2	00:00:00.000
✅Attributes	6	0	0	0	6	00:00:00.000
✅FileFilter	3	0	0	0	3	00:00:00.000
✅Instantiate	5	0	0	0	5	00:00:00.000
✅Operations	7	0	0	0	7	00:00:00.000
✅Properties	12	0	0	0	12	00:00:00.001
✅Validate	1	0	0	0	1	00:00:00.001
✅Files	15	0	0	0	15	00:00:00.002
✅SystemVerilogFile	4	0	0	0	4	00:00:00.000
✅VHDLFile	7	0	0	0	7	00:00:00.002
✅VerilogFile	4	0	0	0	4	00:00:00.000
✅Project	12	0	0	0	12	00:00:00.002
✅Attributes	6	0	0	0	6	00:00:00.000
✅Instantiate	3	0	0	0	3	00:00:00.001
✅Properties	2	0	0	0	2	00:00:00.000
✅Validate	1	0	0	0	1	00:00:00.001
✅VHDLLibrary	8	0	0	0	8	00:00:00.000
✅Instantiate	8	0	0	0	8	00:00:00.000
✅VivadoProject	1	0	0	0	1	00:00:00.024
✅FileSets	1	0	0	0	1	00:00:00.024
✅ PASSED	110	1	0	0	109	00:00:00.034

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Unittest report generated with pytest and visualized by sphinx-reports.